UltraEDA

Capabilities and known limits

Translation features

A living account of the formats, design content, validation coverage, and known limitations supported by the UltraEDA translation service.

Current prototype coverage

Support varies by design type and format revision. Every submitted file will be audited before an export is offered.

Import targets

ACCEL 2006 boards, schematics, and libraries; EasyEDA boards and schematics with embedded library content.

Source intake

EDA exports

ACCEL 14 libraries, EasyEDA Standard JSON, and KiCad 9 boards.

Design output

3D exports

STEP and STL models generated from supported parametric package definitions.

Mechanical output

What translates well

Structured data with explicit connectivity, standard geometry, complete library references, and supported layer semantics produces the cleanest results.

Schematic structure

Components, gates, pins, nets, attributes, hierarchy, and reusable circuit structure.

PCB construction

Components, footprints, pads, vias, traces, layers, nets, graphics, and supported rules.

Library content

Symbols, footprints, pad styles, attributes, and supported 3D associations.

Where review is important

Format-specific behavior cannot always be represented identically. UltraEDA will identify these conditions instead of silently discarding them.

  • Proprietary simulation models, scripts, or encrypted extensionsMay require manual handling
  • Unsupported constraints or vendor-specific rule systemsReviewed during audit
  • Custom fonts, unusual graphics, or display behaviorVisual comparison required
  • Missing libraries, broken references, or ambiguous layer mappingsMust be resolved